At the end of this course, the successful student will be able to:

1. Interconnect engineering concepts related to instruction set architecture, register transfer, interconnects like buses, 3-state buffers and Muxes as well as control hardware to design various processors. Learn to employ specialized knowledge of subsystems like data-path, memory and control unit components to design processing element.

2.  Assessment Methods: Rubrics Based Lab Evaluation, Viva-Voce, Project/Quiz. 

3. Course Evaluation:

 Labs - 60% 

Project/Quiz - 20%

Viva-Vice - 20%

Total :- 100%

Course Material